About 25 years, I work in the embedded system design field. I provide responsive, cost effective engineering services and solutions for embedded system development from system architecture to small module design.
The Institution of Professional Engineers, Japan
Information Processing Society of Japan
Web Analytics Consultants Association
Developed IoT systems for factory automation by using camera sensors.
Researched and developed deep-learning proof-of-concept system for human detection.
Developed Web system for managing a large number of network cameras.
Developed smartphone applications for collecting screen images.
Researched computer vision feasibility and developed the demo system.
Developed network camera device, which enables hi-compression video stream output.
Embedded Computer System Development
Developed 2D/3D graphics computer systems for Arcade Game.
Verified and debugged Engineering Sample ICs (ES) on computer boards by using Logic Analyzer.
Developed low-power, complex math operation RTL modules for ASIC by SystemVerilog.
Planned 3D graphics IP Core system architecture to satisfy required features, gate size and production schedule.
Invented the lighting algorism for real-time 3D graphics to generate photo realistic scene image.
Invented image compression algorithm suitable for real-time image decoding.
Functional Verification/Hardware Emulator
Built SystemVerilog verification environment with random data generation, assertion, and functional coverage.
Improved ASIC verification time by porting the designs from RTL simulation environment to a hardware emulation system environment.
Evaluated the performance of the hardware emulation system to be introduced when multiple designs shared emulator resources simultaneously.
Planned ASIC functional evaluation strategy and implemented on RTL simulation environment.
Planned and built functional verification environment for RTL designs by using black-box, white-box and gray-box testing methods, implemented by hardware verification language (e language).
Verified standard interfaces (PCI, USB and AMBA AHB) with e verification language.
Instructed e verification language methodology to HDL designers of customer companies.
Built the Japanese FAQ web site of e verification language for Japanese HDL designers.
Built processor systems with the designs under test on FPGA based-prototyping systems for robust RTL verification, early software development and IP Core demonstration.
Improved middleware development time by building FPGA based-prototyping system before actual ASIC production.
Open Source Project
USB Host C Library
Open Source C library for FPGA based USB host. The C library provides APIs to control USB HID(Human Interface Device) class device and Mass Storage class device.